|Problems? Is your data what you think it is?|
Generally, protocols that use the parallel port to talk serially (which your MP3 player probably does; count the wires) have a single data out line, a data in line, and a clock line. The clock line allows the timing to be a bit flexible.
For details on this scheme, search for I2C or SMBus.
The problem with using Perl directly for this is that bit timing is often somewhat crucial: there may be lower limits on bit transmission speed before one end or the other decides there's been a problem.
If it won't work in Win2K, it's probably just wiggling the port bits directly using OUT instructions; this won't be easy to monitor without a VXD that traps the instructions. You may be able to find such a VXD, though, on the net.
My strategy would be to do this:
Now, you may not have an oscilloscope or logic analyzer, which will make the job much harder. You can make a simple logic analyzer using the parallel port of another machine and a tight loop in C or assembly language where you repeatedly use inportb or whatever is appropriate for your compiler to read the parallel port lines. You can use a change in state as a trigger.
update: I've found DIY projects for parallel port logic analyzers at http://www.xs4all.nl/~jwasys/old/diy2.html and http://et.nmsu.edu/~etti/winter97/computers/logic/logic.html and http://www.alphalink.com.au/~kevbond/digcro2k.htm
Good luck in your quest!