Beefy Boxes and Bandwidth Generously Provided by pair Networks
There's more than one way to do things

Comment on

( #3333=superdoc: print w/replies, xml ) Need Help??
Thanks a lot again for your second example. This is really along the lines of what I am expecting out of the parser. What I want to do (eventually) with the parsing really depends on how much I am able to do with it :-). At the very minimum, I would like to identify the instantiations, port names, widths, connections, etc to do various kinds of post processing. Coming back to the piece of code you posted: I was able to get it to work by commenting out the exit_if_error() part. I have to admit first that I still need to spend some time to learn what each of these function calls really mean. Here is the example code I tried to test it with:
cat top.v module top (a, b, c, d); input a; input b; output c; output d; inverter i_inverter (.in_a(a), .out_c(c)); buffer i_buffer (.in_b(b), .out_d(d)); endmodule
Granted, this is not much, but this is enough for a starter like me :-) What I didn't give the script were the module definitions of "inverter" and "buffer" modules. I still expected it to at least write out the instantiation names and their port connections. I agree with the error messages below from the scripts output, but I don't understand why doesn't show the instantiation names. Why doesn't it associate the pin names (in_*, out_*) to the instantiation names? Does it absolutely require module references for that?
%Error: top.v:10: Cannot find buffer %Error: top.v:9: Cannot find inverter %Error: top.v:10: Module reference not found: buffer %Error: top.v:9: Module reference not found: inverter Exiting due to errors Module names in netlist: top ModuleName=top HierInstName=top PortDir=input PortName=a PortDir=input PortName=b PortDir=output PortName=c PortDir=output PortName=d PinName=in_b NetName=b PinName=out_d NetName=d PinName=in_a NetName=a PinName=out_c NetName=c
Thanks again for your help

In reply to Re^4: verilog perl usage (Verilog::Netlist) by mahurshi
in thread verilog perl usage by perlvoyager

Use:  <p> text here (a paragraph) </p>
and:  <code> code here </code>
to format your post; it's "PerlMonks-approved HTML":

  • Posts are HTML formatted. Put <p> </p> tags around your paragraphs. Put <code> </code> tags around your code and data!
  • Titles consisting of a single word are discouraged, and in most cases are disallowed outright.
  • Read Where should I post X? if you're not absolutely sure you're posting in the right place.
  • Please read these before you post! —
  • Posts may use any of the Perl Monks Approved HTML tags:
    a, abbr, b, big, blockquote, br, caption, center, col, colgroup, dd, del, div, dl, dt, em, font, h1, h2, h3, h4, h5, h6, hr, i, ins, li, ol, p, pre, readmore, small, span, spoiler, strike, strong, sub, sup, table, tbody, td, tfoot, th, thead, tr, tt, u, ul, wbr
  • You may need to use entities for some characters, as follows. (Exception: Within code tags, you can put the characters literally.)
            For:     Use:
    & &amp;
    < &lt;
    > &gt;
    [ &#91;
    ] &#93;
  • Link using PerlMonks shortcuts! What shortcuts can I use for linking?
  • See Writeup Formatting Tips and other pages linked from there for more info.
  • Log In?

    What's my password?
    Create A New User
    and all is quiet...

    How do I use this? | Other CB clients
    Other Users?
    Others meditating upon the Monastery: (4)
    As of 2018-01-18 12:49 GMT
    Find Nodes?
      Voting Booth?
      How did you see in the new year?

      Results (211 votes). Check out past polls.