in reply to Re^10: Perl 5 Optimizing Compiler, Part 4: LLVM Backend?
in thread Perl 5 Optimizing Compiler, Part 4: LLVM Backend?
I'd be amazed if LLVM could determine that the value won't change between calls!
Sorry, but I do not understand this. One thread == one interpreter == one stack. Code cannot call between threads, and threads do not switch stacks (easily).
If the address of the current interpreter was stored in (say, on Intel) the FS or GS register, when the scheduler preempts one thread and loads another, it would restore that register, just as it does for the SP and IP and all the others. Every time a particular thread/interpreter is running, its context would be available in that register; and (on Intel) all the offsets within that context structure would be available as indexed addressing via that segment register.
On other processors, mostly register rich compared to Intel, the same thing could be done.
Basically, the 'reserved' register is loaded with the context when the thread (including the first) is started, and if nothing else is allowed to touch that register -- pretty much guaranteed on Intel -- it value is always available without needing to pass it around to every function.
LLVM might need a custom addition to its code generation routines (for each platform), to support that, but LLVM allows that to be done.
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Re^12: Perl 5 Optimizing Compiler, Part 4: LLVM Backend?
by bulk88 (Priest) on Aug 29, 2012 at 21:15 UTC | |
by BrowserUk (Patriarch) on Aug 30, 2012 at 02:10 UTC |