Re: how to split file with some pattern

[vinoth.ree]

Hi,

If you have blank line as delimiter in the file you can use below code, Changing $/ to the empty string will cause the perl to read the input as 'paragraph mode', where the input record separator is one or more blank lines.

#!/usr/bin/perl
use strict;
use warnings;

open ($soc, '>', "ck_soc.v") or die "$!";
open ($misc, '>', "ck_misc.v") or die "$!";
open ($analog, '>', "ck_analog.v") or die "$!";

my @data;

{
  local $/ = '';
  @data = <DATA>;
}

my $line;

foreach $line (@data)
{
  if ($line =~/soc/)
  {
     print $soc $line;
  }
  elsif($line =~/misc/)
  {
    print $misc $line;
  }
  elsif($line=~/analog/)
  {
   print $analog $line;
 }

}

close $soc;
close $misc
close $analog;

__DATA__
module soc (PAD_TEST , VDIG_ON , GNDD_ON , VPP_EF , PAD_BOND_OPT );
inout  [31:0] PAD_TEST ;
input  VDIG_ON ;
input  GNDD_ON ;
inout  VPP_EF ;
inout  [5:0] PAD_BOND_OPT ;
endmodule

module analog_atop_wrapper (PAD_VDDTX , PAD_VREFADC , PAD_VSSRF ,
    DPAD_GSUB_XTAL24M , DPAD_GSUB_RX );
inout  PAD_VDDTX ;
inout  PAD_VREFADC ;
inout  PAD_VSSRF ;
inout  DPAD_GSUB_XTAL24M ;
inout  DPAD_GSUB_RX ;
endmodule

module misc_atop_wrapper (VDIG , VRTC , AVDD , EBUS , IOGND , VDIG_ON 
+);
inout  VDIG ;
inout  VRTC ;
inout  AVDD ;
inout  EBUS ;
inout  IOGND ;
input  VDIG_ON ;
endmodule

There can be more efficient way to do this

As I currently do not have access to perl, not tested this code.