Don't know much about transistor schematics.
So your talking about identifying isomorphic subgraphs which are only connected via two nodes (IN and OUT) to the rest of the graph?
As long as those subgraphs are not too big you can simply use a brute force normalization of the incidence matrix, i.e. trying all permutations until certain criterias are optimized.
Sorry anything else is IMHO far too complicated for perlmonks, this doesn't only fill bookshelves it fills international conferences.
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