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Re: Parse for a name after a keyword search in all the files, given directory as input (Verilog)by toolic (Bishop) |
on Feb 17, 2017 at 14:50 UTC ( [id://1182208]=note: print w/replies, xml ) | Need Help?? |
If your Verilog files are very simple, you don't even need Perl. You can just use grep:
If your files are not so simple, then you should use a Verilog parser: Verilog-Perl. For example, if some of your modules are commented out, or if the module keyword is not on the same line as the module name, etc.
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