Hi,
I'm trying similar kind of example shown above by taking a verilog netlist as input and trying to print the module and port names.
I/m facing the below error
%Error: ./lw20_60_719_gates.v:18936: Module reference not found: LATQ_
+X1M_A12TH_C35
%Error: ./lw20_60_719_gates.v:34924: Module reference not found: XNOR2
+_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:34930: Module reference not found: XNOR2
+_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:39141: Module reference not found: OA21A
+1OI2_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:34936: Module reference not found: XNOR2
+_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:39148: Module reference not found: INV_X
+0P5B_A12TH_C35
%Error: ./lw20_60_719_gates.v:34942: Module reference not found: OAI22
+BB_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:39152: Module reference not found: AND2_
+X0P5B_A12TH_C35
%Error: ./lw20_60_719_gates.v:34952: Module reference not found: XNOR2
+_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:39157: Module reference not found: NOR2X
+B_X0P5M_A12TH_C35
%Error: ./lw20_60_719_gates.v:34958: Module reference not found: XNOR2
+_X0P5M_A12TH_C35
can u please help me on this .....
What i'm trying is when i gave the netlist it should give the top module primary output ports (PO's) as a output.
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