Do you know where your variables are? PerlMonks

### Re^5: Representing all data as Lists

by blokhead (Monsignor)
 on Sep 20, 2005 at 22:18 UTC ( #493610=note: print w/replies, xml ) Need Help??

in reply to Re^4: Representing all data as Lists
in thread Representing all data as Lists (Perl7?)

because if bits take up a finite volume (and the speed of light is constant),
I really can't tell if you're trying to mock the value of the kinds of theoretical claims I made, or you really think that the mass & volume of photons are a significant factor in algorithmic analysis.

You are right that there are a lot of factors when dealing with physical machines instead of theoretical ones. But on my computer, the amount of pyhsical RAM does not depend on the input size to algorithms I'm running. And in my exercise, we are fixing two computers & two competing algorithms, and varying only the input sizes to these algorithms. So I prefer to treat memory lookup time as a constant.

The point of my previous reply is that if I upgrade computers, then memory access time, CPU cycle time, etc, are each smaller constants, but still constants. Eventually, as the input sizes increase, the algorithm with the best asymptotic performance will win. And in the case of a reasonable O(1) or even O(log n) algorithm (where "reasonable" means the constants are not insanely large) on a slow machine vs a reasonable O(n) algorithm on a fast machine, the better algorithm starts winning perhaps sooner that you'd expect.

blokhead

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Re^6: Representing all data as Lists
by Anonymous Monk on Sep 20, 2005 at 23:28 UTC
And in my exercise, we are fixing two computers & two competing algorithms, and varying only the input sizes to these algorithms. So I prefer to treat memory lookup time as a constant.
Sure, when you start performing your algorithmic analysis, there's nothing preventing from stating as an axiom...
1. memory lookup is O(1)
2. ...
Just be aware that this is an axiom after all and only true for a particular set of von Neumann type machines. Or stated another way, for certain given problems and the same finite amount of silicon, there are better ways to arrange the wires between the transistors (like say into a shift register instead of a tree (RAM)). And your complexity analysis (with Axiom #1 from above) will be incorrect and lead to answers which aren't consistent with the actual performance of the physical machine.

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