in reply to Re: "Cleverness" from HOP
in thread "Cleverness" from HOP


That misstates the premise and then follows up with a faulty reducto ad absurdum.

The common thread there is discerning when it is appropriate to apply high cleverness versus keeping it simple. The return on pushing chip designs is likely to be much higher, as are incremental improvements at core levels. On the other hand, if you don't need the performance gains from pushing the envelope, you can get satisfactory results at a much lower cost. That works for hardware and software. It's not black and white.

So, it's not a case of "what's the alternative?" That presupposes a binary matter which the proposed answer builds on.

The HOP quite is speaking to three approaches to a problem with increasing levels of cleverness. Having not looked at the specific example, I can't say for certain, but I'd suppose that the approaches make tradeoffs in maintainability versus performance (for various values of performance).

Avoiding gratuitous cleverness is not the same thing as writing "dumb" code. Not even close. Completely wrong much of the time, even.